Design and Implementation of Data Navigator for Heterogeneous Multi-Core System

For a multi-core system with multiple peripherals, the usual communication between cores and data transmission between cores and peripherals is single, and the data transfer cannot be planned, shaped, or congested-controlled. In this research, a Data Navigator that is used to manage data transport in a multi-core system is studied. The Data Navigator consists of two parts: Data Manager and Data Transfer Controller. When so many devices are requested to transmit data, the data manager uses a three-level priority adjustment technique, and the data transfer controller switches to DMA mode and uses the AXI bus to convey the data. The proposed architecture may provide equitable and efficient data transmission in a certain multi-core system environment, balance response speed, complete data shaping, and improve system performance overall, according to experimental results.