110.1dB DR 4-ch Audio ADCs and 98dB DR 2-ch Voice-Triggering ADCs in Reconfigurable Architecture with Enhanced Off-Transistor-Based Bias Noise Filter

The number of channels of audio ADC in the applications of mobile phone and TWS (True-Wireless Stereo) continues to increase for the enhanced user audio experience with smaller chip size. Moreover, the hours of use are also increasing to support the always-on background voice recognition such as VTS (Voice-Trigger System). These requirements motivate the reconfigurable architecture of channel for less chip size and the reduction of power consumption per channel for long battery lifetime. The sample-and-hold noise filter [1] and the gate leakage compensated off-transistor-based bias noise filter [2] reduced the area and power consumption of the DAC reference which account for 91% of noise in I-steering DAC [1]. However, [1] limits the trade-off between bias voltage drift and folded sampling noise. [2] overcomes this issue but suffers from the voltage drift of high impedance output node by well-diode leakage. This paper addresses these limitations with enhanced off-transistor-based bias noise filter in reconfigurable audio/VTS ADC.