Design and Implementation of Reconfigurable Array Structure for Convolutional Neural Network Supporting Data Reuse

Convolutional neural networks have been widely used in image processing, speech recognition and other fields. As the performance of convolutional neural networks improves, the scale of their models continues to expand, which brings new challenges to convolutional neural network accelerators.In this paper, a reconfigurable array structure that supports data reuse is designed according to the computing characteristics of convolutional neural networks, and different convolutional neural networks can be processed by switching the configuration information. At the same time, the parallel mapping of ShuffleNet V2 and MobileNet V2 are designed and implemented. The experimental results show that under the operating frequency of 120MHz, the array structure needs up to 28 clock cycles to calculate a l×l convolution, and 45 clock cycles to calculate a 3 ×3 convolution. For an image with an input of 224×224×3, ShuffleNet The estimated implementation time for V2 is 69098112 clock cycles; the estimated implementation time for MobileNet V2 is 2454268992 clock cycles.