Automatic Identification of Printed Circuit Board Vias based on YOLO Algorithm

As the core component of small electronic products, the Printed Circuit Board (PCB) is of multi-layer structure to ensure complex circuit design. In a multi-layer PCB, the electrical signals between the layers are transmitted through the vias. Accordingly, the quality of vias would be highly related to the signal integrity of the PCB. In this study, an automatic via identification model based on YOLO algorithm is developed. The objective is to help engineers quickly locate the via on the section image of a multi-layer PCB which is necessary for subsequent processing. For four kinds of vias, the presented identification model can not only ensure reasonable recognition results (89% mAP), but also a high processing speed (26FPS). It has practical application prospects in PCB manufacturing process.