A 200-MHz seventh-order equiripple continuous-time filter by design of nonlinearity suppression in 0.25-/spl mu/m CMOS process

Seventh-order equiripple filter with cutoff frequency of 200 MHz is developed in CMOS 0.25-/spl mu/m process. A new design method has been adopted to obtain enough accuracy and linearity in high-frequency operation. Optimal device sizes are determined, which maximize the accuracy. The most suitable filter configuration is determined, which suppresses the influence of the nonlinearity of the transconductors over the linearity of the filter. Experimental results satisfied group delay variation of /spl plusmn/5% and achieved total harmonic distortion of less than 1% for 800 mV/sub ppd/ differential input.