Intra-chip wireless interconnect for clock distribution implemented with integrated antennas, receivers, and transmitters

A wireless interconnect system which transmits and receives RF signals across a chip using integrated antennas, receivers, and transmitters is proposed and demonstrated. The transmitter consists of a voltage-controlled oscillator, an output amplifier, and an antenna, while the receiver consists of an antenna, a low-noise amplifier, a frequency divider, and buffers. Using a 0.18-/spl mu/m CMOS technology, each of these individual circuits is demonstrated at 15 GHz. Wireless interconnection for clock distribution is then demonstrated in two stages. First, a wireless transmitter with integrated antenna generates and broadcasts a 15-GHz global clock signal across a 5.6-mm test chip, and this signal is detected using receiving antennas. Second, a wireless clock receiver with an integrated antenna detects a 15-GHz global clock signal supplied to an on-chip transmitting antenna located 5.6 mm away from the receiver, and generates a 1.875-GHz local clock signal. This is the first known demonstration of an on-chip clock transmitter with an integrated antenna and the second demonstration of a clock receiver with an integrated antenna, where the receiver's frequency and interconnection distance have approximately been doubled over previous results.