Implementation of 8-Channel Pulse Width Modulation with AXI4-Lite Interface

This paper presents the implementation of an 8-channel Pulse Width Modulation (PWM) block using Hardware Description Language (HDL) which is controlled by an AXI4-Lite interface. The block was generated with the input and output signals necessary for the modulation and from there an interface was made with the protocol through a register mapping that controls the configuration to generate each PWM signal independently. The block and the interface were verified separately, and the synthesis and simulation results are shown, generating a block whose input are the read and write signals of the protocol and the outputs are the 8 independent channels with different duty cycle configuration.