Low-Power K/Q-Band Digital Phased Array Chiplet

The DARPA Millimeter Wave Digital Arrays (MIDAS) program has developed an extremely low-power integrated circuit (IC) operating from 18 to 50 GHz for use in a tiled Active Electronically Scanned Array (AESA) implementation. Each chiplet provides thirty-two transmit and thirty-two receive channels with partial beamforming in the digital domain, supporting dual-polarized operation over sixteen antenna elements with very high dynamic range. This chiplet is designed such that multiple copies of the higher-level tile assembly may be formed into arrays of an arbitrary size through abutment. This paper will describe the architecture, implementation, and performance for this ground-breaking CMOS monolithic device. Descriptions of the key circuit blocks are included as well as the simulated performance of key sub-circuits.