Characterisation and Modelling of 22-nm FD-SOI Transistors Operating at Cryogenic Temperatures

The semiconductor approach to quantum computing appears the best positioned in the race for fully integrated quantum cores incorporating both the qubit structures and electronics necessary to read and control them. One of the major limitations hampering the efforts is the lack of semiconductor device models compatible with commercial EDA tools that can accurately predict the effects of cryogenic temperatures over integrated devices electrical parameters. To obtain such models, the devices must be measured at that extremely low temperature over a wide range of operating conditions. This paper presents preliminary characterisation results of devices used in a quantum processing unit in a 22-nm fully depleted silicon-on-insulator (FD-SOI) CMOS process, as well as simulation results using a Verilog-A model based on measured I/V curves for different FD-SOI transistors.