First-order Hold DAC Reconstruction Filtering for Efficient Image Rejection

When converting a signal from the digital domain into the analog domain through a digital-to-analog converter (DAC), spurious image components appear in the DAC output signal. In the typical case where the DAC uses a zero-order-hold (non-return-to-zero) pulse, these images are only attenuated by a sinc filter. In this work we present a technique to implement an analog first-order-hold filter to greatly improve the image rejection of the DAC output signal. After deriving the architecture on the system level, an actual transistor level circuit is designed in 180 nm CMOS for a sampling frequency of 300 MHz. This circuit is evaluated through extensive simulations and it is found that its image rejection ratio is 20 dB better than the conventional zero-order-hold and 10-dB better than a 1st-order lowpass. Instead its performance is close to that of a 2nd-order lowpass filter.