Asynchronous Controller Design and Simulation Using Signal Transition Graphs

In applications that can take advantage of their characteristics, asynchronous circuits (ACs) can have several benefits over synchronous implementations, such as lower power consumption and better modularity. Mixed Signal Power Management (PM) controllers are an example application that greatly benefits from the use of ACs. Nonetheless, due to the difficulty associated with using asynchronous design tools, many designers still resort to synchronous circuits or to ad hoc strategies in the design of these controllers, often leading to inefficient implementations. This paper details the step-by-step application of a design flow for ACs using Signal Transition Graphs (STGs). A guideline for converting a typical state diagram specification to a STG is given, as well as design considerations and solutions for frequent problems when using STG based tools, with the aim of facilitating their adoption. A novel tool that generates self-testing Verilog code based on STG traces is introduced, facilitating testing of the synthesized circuits.