A 6-18GHz Low-Noise Amplifier Using Noise Canceling Technique in 130-nm CMOS PD-SOI

This paper presents the design of a 6-18GHz low-noise amplifier (LNA) utilizing noise canceling technique to achieve large bandwidth and low noise figure (NF) simultaneously. The LNA is composed of three stages, resistive shunt feedback cascode topology is adopted for the first one, which is convenient for wideband input impedance matching. Besides, the second and third stage are designed for noise canceling and gain compensation respectively. Inductive peaking technique is employed to broaden the bandwidth. Implemented in 130-nm CMOS PD-SOI technology, the proposed LNA achieves maximum 15.44dB gain and minimum 2.42dB NF with flatness of ±1.44dB and 0.109dB/GHz respectively across 6-18GHz, whose fractional bandwidth is as large as 100%.