Investigation on SiC MOSFETs with Long Time Nitridation Treatment under Dynamic High Temperature Gate Stress

SiC MOSFET has become one of the most promising power devices due to its significant advantages over its Si counterparts. However, the stability of threshold voltage is still of great concern to application engineers. In this article, we experimentally investigated the dynamic gate bias temperature instability of the homemade SiC MOSFETs with long-time nitridation for improving the quality of $\text{SiC/SiO}_{2}$ interface. It is found that the negative shift of threshold voltage under dynamic gate bias is induced by the coupling effect of thermal stress and electrical stress. The negative shift of threshold voltage does not exceed 0.04V at room temperature and/or the off-state gate voltage is lower than -7V, while it reaches 0.52V if the off-state gate voltage becomes -9V and the junction temperature is 175°C. Experimental characterizations of the Cgs-Vgs of those SiC MOSFETs indicate that there is a positive-charge-injection induced negative shift of flat-band voltage. The reason could be that the long-time nitridation after thermal oxidation in the fabrication process introduced many nitrogens at $\text{SiC/SiO}_{2}$ interface, and further generated lots of hole traps in the near interface. Therefore, a more dedicated optimization of the passivation technique for SiC MOS structure is still needed to obtain high channel mobility as well as high stability of threshold voltage.