A 5-GHz 0.15-mm² Collision-Avoiding RFID Employing Complementary Pass-Transistor Adiabatic Logic With an Inductively Connected External Antenna in 0.18-μm CMOS

A low power, small form factor, and collision-avoiding radio-frequency identification (RFID) tag is proposed. By applying complementary pass-transistor adiabatic logic (CPAL) and a two-phase clock, not only the required power of operation is lowered but also large capacitors necessary for stable operation are eliminated, which leads to a reduced chip size. Additionally, the external antenna used is inductively connected instead of solder bonded, which contributes to a lower-assembly cost. A collision-avoidance system exploiting counter and bit shift is also proposed. Results show the proposed RFID is capable of communication twice as far as the one using conventional adiabatic logic with one-eighth of the reader’s transmission power, as well as having the whole chip downsized by 94%. It is also confirmed that collisions between three tags are avoided thanks to the collision-avoidance system.