Implementation of 1.8V MIPI RFFE slave controller in CMOS 180nm process for 5V RF front-end modules

In this paper, the implementation results of 1.8V CMOS RFFE slave circuits on 180 nm complementary metal-oxide semiconductor (CMOS) process for 5V RF front-end modules are provided with the measurement results of RFFE communication with a configuration of a master and the designed slave. The implemented RFFE CMOS chip has been designed to comply with MIPI RFFE version 1.1 standard, and consists of PoR, SDATA transceiver, and SCLK receiver. For the experimental evaluation, three RFFE operations were sequentially performed: READ the initial value at register 0x20, WRITE a new value, and READ again the register for checking the operation of the WRITE. The all measured pulse waveforms are in a good agreement with the MIPI RFFE interface specification version 1.1 as designed.