HDL Design and Implementation of a Convolutional Neural Network for Efficient FPGA/Hardware Platforms

Neural networks are a set of algorithms modeled on the human brain, primarily for pattern recognition which has a special category called convolutional neural networks. Convolutional neural networks also called as ConvNets or CNNs which is the most important tool for the machine learning practitioners today. CNN has proved that its works effectively in various areas such as recognition of image and classification. This CNNs also have been proved successful in identifying objects and faces and identifying traffic lights apart from powering vision in robots and self-driving cars. Among these layers hidden layer plays an important role which inturn consists of convolution, Activation Filter (ReLU) and pooling. Any CNN which is used in identifying image or classifying an object etc., must contain these blocks to work efficiently for classification of the higher representation of the image content. The primary contribution of this work is a step towards assisting an introductory designer targeting to design and implement a basic CNN in FPGA and detailed design procedure and steps are outlined in the paper. Basic CNN by taking 5*5 input feature is designed in Xilinx Vivado and parameters such as area, delay and speed are compared.