IPC-loss: A fine-grained processor performance analyze method

CPI stacks is an effectively way to analyze the design bottlenecks of processor cores. However, conventional CPI stacks models always analyze the performance of the processor based on the global status via selecting a typical event as the cause of the stall in one cycle, which may lead to inaccurate analysis of the actual design bottlenecks. Based on conventional CPI stacks, this paper proposes a performance analysis method based on Instructions per Cycle loss (IPC-loss). This method points out the main contents of processor that needed to be optimized via obtaining the instruction loss of each pipeline stage, and fine-grained analysis the bottlenecks of processor via other method including CPI stacks of each stage. By experiments on gem5 simulator, the IPC-loss analysis method proved to be helpful for processor design analysis.