Efficiency and DC-link Ripple Analysis of Neutral-Point-Less (NPL) Multilevel Inverter with Discontinuous Pulse Width Modulations

Advanced modulation techniques of multilevel inverters (MLIs) have been explored to improve efficiency while reducing harmonics. Discontinuous pulse width modulation (DPWM) is advantageous in reducing switching transitions and power losses, but it increases DC-link voltage and current ripple due to the neutral point connection in conventional MLIs (e.g., T-type and NPC inverters). This paper explores the application of five different DPWM techniques to a neutral-point-less (NPL) MLI topology, the H-type inverter, and provides a comprehensive analysis of efficiency and DC-link ripple compared to the conventional T-type inverter. In the H-type inverter, all five DPWM techniques reduce the DC-link current and voltage ripples, and using DPWM2, these values are 58% and 61% lower than SVPWM, respectively. This leads to a 0.413% increase in efficiency, which is equivalent to a 1.45 kW power loss reduction with a 350 kW inverter. An NPL H-type inverter prototype was used in experiment to verify that the DPWM modulations reduce the DC-link voltage ripple and input current, as well as harmonics. DPWM2 has a reduction in DC-link voltage ripple of 65.7% and a 63.9% decrease in input current ripple. The harmonics of the voltage and current waveforms were also reduced by approximately 90% and 70%, respectively.