Efficient Modeling of Random Jitter Due to Stochastic Power Supply Noise in CMOS Inverters

In this paper, analytical expressions are developed for estimating random jitter (RJ) in the presence of stochastic power supply noise for CMOS inverter circuits. The proposed approach employs probability density function of the propagation delay associated with a CMOS inverter in the presence of supply variations with normal distribution. The closed-form relations are further advanced to include the effects of load. The proposed model demonstrates a reasonably accurate prediction of RJ and yields significant speed-up compared to using a circuit simulator (HSPICE) for a case study with 22nm CMOS technology.