Architecture and 28 nm CMOS Design of a 1886 MBin/sec Context-Adaptive Binary Arithmetic Coder (CABAC) Encoder

Entropy encoding is a key element in H.264/MPEG-4 AVC video coding responsible for the efficient and lossless compression of transformed and quantized data. Context-Adaptive Binary Arithmetic Coding (CABAC) is one of the two entropy coding methods available in the H.264 standard, and achieves a 15%–19% greater bit-rate reduction than the optional CAVLC method. However, the computational complexity of CABAC is much greater due to its combination of arithmetic coding and adaptive context modeling, so hardware acceleration for CABAC is necessary for real-time high resolution video coding. We present a hardware CABAC encoder for the H.264 main profile that supports all CABAC functions including context initialization, binarization, context modeling and binary arithmetic coding in hardware. The architecture of the CABAC encoder contains a six-stage pipeline and is capable of encoding at a rate of 1 bin per cycle where a bin is a binarized encoded symbol. The CABAC encoder was implemented in a 28 nm FD-SOI CMOS technology occupying a chip area of 33,411 µm
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which is equivalent to 23.4K minimum-sized NAND logic gates. The synthesized CABAC encoder achieves a clock rate of 1.886 GHz which is 3.04× greater than the previously fastest known design, and it achieves a throughput of 1,886 MBin/s which is 1.10× greater than the previously fastest known design. The design was also laid out in a standard cell chip design and achieves a clock rate of 1.495 GHz which is 4.53× greater than the previously fastest known design, and it achieves a throughput of 1,495 MBin/s which is 1.06× greater than the previously fastest known design. At a supply voltage of 0.8 V, the laid out chip design can process 769 million bins per second which is sufficient to encode real-time 4K UHD (3840×2160) video at 60 frames per second while dissipating an average power of 11.48 mW.