A Synthesis Friendly Dynamic Amplifier with Fuzzy-Logic Piecewise-Linear Calibration

This paper presents the first synthesis friendly dynamic amplifier (DA). The proposed fuzzy logic calibration makes its gain robust against process-voltage-temperature (PVT). In addition, the piecewise-linear linearization technique is also proposed for the fuzzy logic to tune the amplification phase, which compensates the time-domain non-linearity of the regeneration voltages, and accelerates the calibration convergence. The proposed DA is designed in 28-nm CMOS process, and verified by post-simulation results. It has a 16 × gain with -3.0%~3.6% deviations at TT corner once the calibration converges within 50 cycles.