Offset Rejection in a DC-Coupled Hybrid CMOS/Memristor Neural Front-End

One of the challenges of designing neural front-end is to reject the DC offset from electrodes. The conventional AC-coupled solution is to utilise large input capacitors and pseudo-resistors, which have the key limitations of area, linearity and DC drift. In this paper, we propose a DC-coupled solution based on the hybrid CMOS/memristor technique. The spike detection is realised by thresholding in the proposed front-end, which consists of a memristive amplifier and a DLC. The amplifier boosts micro-volt neural signals to milli-volt through integration, making it recognised by the DLC. In addition, the memristor is utilised as a trimming device along the current branch for the purpose of tuning the offset voltage. It is capable of compensating up to 50mV DC offset. With the oversampling ratio reaching 95, the accuracy spike detection can be maintained to 95% and the frontend consumes 123.5nW in our design example. The proposed DC offset front-end is capable of reaching high accuracy and low power consumption.