A 0.25 /spl mu/m 3.0 V 1T1C 32 Mb nonvolatile ferroelectric RAM with address transition detector (ATD) and current forcing latch sense amplifier (CFLSA) scheme

A nonvolatile 32 Mb ferroelectric random-access memory with 0.25 /spl mu/m design rules uses ATD control for SRAM applications and a common-plate folded bit-line cell scheme with current forcing latched sense amplifier for low noise level without cell area penalty.