100 kHz Large-Signal Bandwidth GaN-Based 10 kVA Class-D Power Amplifier With 4.8 MHz Switching Frequency

Power amplifiers (PAs) are widely used, for example, to emulate the behavior of the power grid or electric machines under critical operating conditions, to measure the impedance of the power grid, or to generate specific impedance profiles in power-hardware-in-the-loop (P-HIL) tests. To accurately emulate dynamic effects and to characterize power electronic systems featuring wide-bandgap power semiconductors, PAs with very high output voltage quality and ever higher bandwidth (BW) at full output power are required, motivating the development of ultrahigh bandwidth power amplifiers (UHBW-PAs). While linear UHBW-PAs achieve very high signal fidelity and BW, they suffer from a tremendously bad efficiency, demanding large cooling effort and resulting in uneconomical operation, particular at high power levels and/or during long-term tests. Therefore, this article investigates possibilities for a switch-mode realization of UHBW-PAs with significantly higher efficiency and power density compared to existing solutions. There are two key concepts, namely series- and parallel-interleaving of multiple switching and/or converter cells, that allow to increase the
effective
switching frequency relevant to output filtering without increasing the individual device switching frequency that determines the per device switching losses. This article analyzes comprehensively the advantages and disadvantages of a combination of series- and parallel-interleaving in terms of losses, volume and complexity scaling. Finally, a UHBW-PA with
$\mathbf {10}$
kVA output power (single-phase), a nominal rms output voltage of
$\mathbf {230}$
V, a full-power BW of
$\mathbf {100}$
kHz, very high output voltage quality (third and fifth harmonic
$\mathbf {< 2.5}$
V and
$\mathbf {< 1.2}$
V, respectively), an efficiency
$\mathbf {>95\%}$
, a power density of
$\mathbf {25}$
kW/dm
$\mathbf {^{3}}$
(
$\mathbf {410}$
W/in
$\mathbf {^{3}}$
), and a switching frequency of
$\mathbf {4.8}$
MHz is presented. A hardware demonstrator is built and extensive measurements verify the system performance and confirm the calculation from the initial analyses with loss models.