Case Study For STI-LDNMOS Burned During HCI Stress to Passing Reliability Specifications

The I
bmax
(Maximum Substrate Current) of general LDNMOS has two peaks, one is located at N
drift
(N drift region) under G
ox
, far from the pinch-off point, while the other is close to the pinch-off point [1]. Considering the actual application of the component, we chose the first peak for HCI (Hot Carrier Injection) stress, and found that the 32V symmetry STI-LDNMOS (Shallow Trench Isolation Lateral Diffusion) on different platforms (A and B) seem to have different reasons for burning. The experimental data shows that the component burnout of platform A is similar to the papers published by the authors [2], that is, HCI stress will degrade the diode characteristics of drain to bulk, making the maximum electric field closer to the drain terminal and the kirk effect of I
b
V
g
worse. What's interesting is that during the HCI stress of the components on platform B, the measured I
d
V
d
, I
b
V
d
and I
b
V
g
do not have the signs of burning like those of platform A. In order to clarify the reason for its burning, we performed a series of experiments, and finally proved that it may originate from BJT (Bipolar Junction Transistor) being turned on, not HCI induced TDDB (Time Dependent Dielectric Breakdown). Finally, in order to save costs, we chose to change the process conditions of LDNH2 (N
drift
is near the channel) for reducing the implant energy and increasing the concentration to solve the burn-out problem and pass the criteria.