Reliable High-Voltage Drain-Extended FinFET With Thermoelectric Improvement

In this article, a reliable drain-extended (De) fin-shaped field-effect transistor (DeFinFET) with improved thermal performance and electrical performance is proposed for high-voltage (HV) system-on-chip (SoC) applications at 10-nm technology nodes. The proposed device structure uses the dual split field plate (DS) technique and high thermal conductivity of silicon dioxide (SiO2), which enables significant thermal improvement in DeFinFET. The proposed structure shows an improvement in maximum lattice temperature (
${T}_{\text {MAX}}$
) from 473 to 424 K, and an improvement in thermal resistance (
${R}_{\text {TH}}$
) from 18.7 to 11.9 K/
$\mu \text{W}$
. As a result, effective electron mobility (
$\mu _{\text {eff}}$
) is consequently enhanced, which enables the highest ON-current (
${I}_{\text {on}}$
) of the proposed device structure compared to the conventional DeFinFET (plate with SiO2) and previous DeFinFET (plate with HfO2). This thermal and electrical co-improvement indicates that the proposed device structure with DS technique could enable the thermal-aware design for next-generation HV SoC application.