Performance Analysis of Energy Efficient MAC Unit for Digital Applications

In DSP applications, the MAC unit is very crucial element. Because the adder and multiplier are the two most significant components in a MAC unit, choosing the right one is essential for creating a functional one. As a result, a 16-bit MAC unit based on a 4-bit Ripple Carry Adder and a 4x4-Vedic Multiplier in this paper. HSPICE Synopsys Tool is used for simulation to mimic the MAC unit. COSMOSSCOPE is used to determine the latency of all circuits in the MAC unit. For the delay and power, the MAC implementations of proposed and current architectures are compared. The suggested MAC architecture, which employs a Vedic multiplier and a ripple carry adder, considerably lowers circuit delay and excessive power consumption, resulting in increased speed and performance.