A 2.4GHz Full-Duplex Transceiver with Broadband (+120MHz), Linearity-Calibrated and Long-Delayed Self-Interference Cancellation

A 2.4GHz Full-Duplex (FD) transceiver which employs multiple self-interference (SI) cancellation techniques featuring wideband SI suppression, highly-linear cancelers and the ability to cancel a measured long-delay spread SI up to 171ns is presented. A prototype chip was implemented in TSMC 40nm process and works with an Altera FPGA to complete the radio backend digital calibration and cancellation. The FD chip integrates an electrical-balanced duplexer (EBD) with tuning impedance, two broadband 5-complex tap true-time delay RF cancelers, and a baseband mixed-signal cancellation path operating with an FPGA to complete a long-delay spread SI canceler. 62dB of SI suppression was measured across a cancellation bandwidth (BW) of +120MHz for delay spreads up to 0.3ns. 18-23dB of SI suppression with an 80MHz cancellation BW was achieved for delay spreads between 0.4ns and 171ns. The entire analog system allows for digital calibration of the canceler linearity and frequency response. The RF canceler has a post-linearity calibration IIP
3
of +42dBm, while the RX has a measured maximum gain of 40dB, 6.8dB NF and −21dBm IIP
3
.