Automatic test generation for analog circuits using compact test transfer function models

The problem of test generation for analog circuits is made complicated by the fact that most test generation algorithms use repeated circuit simulation to derive the optimal test stimulus and this is very expensive in terms of computer time. In this paper, we introduce the notion that during test generation, the circuit models need capture only those aspects of the input-output behavior of each circuit module that relate to the kinds of waveforms that the circuit and its constituent modules will see during the testing process. This is usually a small subset of the total space of waveforms that can be applied to the circuit-under-test during regular operation Hence, during repeated simulation for test generation, much simpler circuit models can be used to significantly speed up the test generation process These simple models, referred to as test transfer function models do not compromise test quality or fault coverage Preliminary results for small-signal AC testing of analog circuits show the potential of the proposed approach.