Trace Characterization based Cache Replacement Policy

As various types of applications are released; it is required to have more adequate cache replacement policy in the cache of microprocessors. Based on our investigation, cache line eviction is not determined by only a single factor, so multiple factors should be evaluated to find optimal answers. The Least Recently Used (LRU) can only exploit data that has a short reuse distance. However, we observe some of the applications have long reuse distances and some others have a mix of short, mid, and long reuse distances. If the replacement policy can learn the access pattern, we could get better cache performance with extra storage for training and driving the cache. In this paper, we proposed a policy that will train periodically to understand the reuse pattern of the trace and determine the capped reuse distance that will be used for ceiling partial ways of the LLC (Last Level Cache). We see that LRU covers 100% of the short reuse distance but only 3% mid-range and 0% long-range reuse distances. Whereas Ship++ covers 87% short, 67% mid, 46% long distances and Hawkeye covers 94% short, 60% mid, 35% short, similarly our proposed Trace characterization based capped reuse history (TCRH) covers 98% short, 55% mid, 31% long distances. The main goal of the proposed scheme is that the replacement policy should work adequately in different patterns of trace that can be a short-reuse distance, long reuse distance, or mixed reuse distance. We capture some key parameters of the trace by training. Overall TCRH improves MPKI over LRU by ~12% which is 12% more than Hawkeye and 30% more than Ship++.