Effect of Bit Line Voltage Stress on Half-Selected Device in 1T1R Array

Resistive random access memory (RRAM) becomes one of the solutions of embedded memory under advanced technology node. In this paper, we investigate the program disturb issues for the half-selected cell in 1T1R array. By utilizing the stress testing and RTN measurement, we conclude that the high source-drain voltage induced excess defects in the oxide layer is the main reason for the degradation of the FinFET. Therefore, the program voltage applied on BL of 1T1R array needs to be controlled to guarantee the reliability. Keywords: 1T1R, FinFET, half-selected cell, disturbance