Modeling method for power distribution network in the micro-system packaging

The rapid development of through-silicon via (TSV) technology provides technical support for the realization of the micro-system packaging. The power distribution networks (PDN) at different layers are connected by TSV. The small size of the TSV bring great impact to the PDN due to its large parasitic inductance. Aimed at this point, the modeling method for the multilayered PDN connected by TSV is proposed. The TSV array and power/ground plane pair are first built, then the cascaded model is built to model the multilayered PDN. To verify the accuracy of the circuit model, its result is compared with that of HFSS. The comparison results show that: the error is less than 10% within a certain frequency range of interest.