Influence of Solder on De-Embedded Capacitance

Surface mounted capacitors and inductors need to be welded on the fixture to extra the electromagnetic characteristic of device under test (DUT). We usually use de-embedding algorithm to remove the influence of fixture. However, besides of the influence of fixture, many possible interferences including solder will be introduced in the de-embedded process of DUT. In this paper, the parasitic parameters introduced by solder are found to consist of two parts by employing commercial full-wave simulation software. One is the parasitic capacitor between two pieces of solder, another is the parasitic capacitor between solder and ground plane. The effect of solder on de-embedded capacitance with different nominal value is also illustrated through measurement example.