Two-stage CMOS/GaAs HBT Doherty Power Amplifier Module for 5G Handsets

This paper presents a two-stage Doherty power amplifier module (PAM) in CMOS SOI and GaAs HBT technologies for 5G handsets. While the driver amplifier is implemented using SOI CMOS for low cost, the carrier and peaking amplifiers are implemented using InGaP/GaAs HBT for high efficiency and linearity. The proposed Doherty PAM has a differential driver whose two output terminals are connected to the input ports of the carrier and peaking amplifiers, respectively. For the 3.35 GHz continuous-wave (CW) signal, the proposed PAM exhibited a power-added efficiency (PAE) of 30.3% and a power gain of 29.8 dB at a peak output power of 32.2 dBm. Using the 5G New Radio (NR) signal with a peak-to-average power ratio (PAPR) of 9.7 dB and a signal bandwidth of 100 MHz, a linear gain of more than 19.5 dB and a linear output power of more than 17 dBm in the range of from 3.15- to 4.15 GHz with a supply voltage of 4.5 V.