The End-of-Substructure Card for the ATLAS ITk Strip Detector: Status of the Electronics Design and Results from Recent Quality Control Tests

The silicon tracker of the ATLAS experiment will be upgraded for the upcoming High-Luminosity Upgrade of the LHC (HL-LHC). The main building blocks of the new strip tracker are modules that consist of silicon sensors and read-out ASICs, the latter hosted on hybrid PCBs. Up to 14 modules are assembled on carbon-fibre substructures, commonly named staves in the central barrel region and petals in the two end-cap regions, for mechanical support. An End-of-Substructure (EoS) card is located at the end of each substructure and facilitates the transfer of data, power, and control signals between the modules and the off-detector systems. The module front-end ASICs transfer data (up to 28 differential lines at 640 MBit/s) to low-powered GigaBit Transceivers (lpGBT) ASICs on the EoS card. The lpGBT(s) provide data serialisation and use a 10 GBit/s versatile optical link plus transceiver (VTRx+) package to transmit signals to the off-detector systems. To meet the tight integration requirements in the detector, several EoS card designs have been realised. The produced prototypes have been populated with the currently available versions of the lpGBT and VTRx+ ASICs. Here, we present the current status of the EoS cards electronic design, results from extreme temperature, magnetic field and integration tests. Additionally, we discuss the results of detailed investigations into the optical signal quality and introduce a new eye-diagram extraction tool to be used in the Quality Control (QC) procedure that aims to ensure full functionality of the EoS card throughout the entire HL-LHC operation.