Design of a Current-Mode Front-End Readout ASIC Featured 100 pC and 20 Mcps for High-Speed Photon Counting

This paper presents the design of a current-mode readout ASIC for high-gain detectors to meet the high-speed photon-counting application. A regulated common-gate amplifier and a current mirror with negative feedback are proposed to implement the preamplifiers. The input resistance and the -3 dB bandwidth of the two preamplifiers are carefully taken into account. In addition, a current-mode comparator is adopted to reduce the propagation time. In order to mitigate the effects of preamplifier output noise, a current-mode comparator with hysteresis is designed. An eight-channel front-end readout ASIC is designed in CMOS 0.35 μm 3.3 V process. Each channel is consisted of a current-mode preamplifier, a current discriminator, a 7-bit current-steering digital-to-analog converter (DAC) and a large bandwidth output buffer. Test results indicate that the maximum count rate of the readout ASIC is larger than 20Mcps.