A 2 Gbps Custom LVDS Transceiver for the ARCADIA Project

In the scope of the ARCADIA project, a set of custom LVDS driver and receiver has been fabricated in a 110 nm CMOS technology for the ARCADIA first Main Demonstrator chip (MD1), a 512x512 monolithic, fully depleted pixel matrix. The link is designed to provide a data rate of 2 Gbps and implements a control over the driver current in order to meet the needs of a low-power mode foreseen for the MD1. This paper will present the results from the characterization of the receiver/driver in a loopback configuration, and compare them to simulations.