ToASt: A 64 Channels Readout ASIC for Silicon Strip Detectors in 0.11 μm CMOS Technology

A 64-channel Application-Specific Integrated Circuit (ASIC) has been designed for the readout of the Silicon Strip Detectors that will equip the Micro Vertex Detector of the PANDA experiment. The ASIC, named ToASt, provides both time of arrival and released energy measurement of the particle crossing the detector.The ASIC is synchronous to a 160 MHz master clock, which also sets the time resolution. The time of arrival of both the rising and the falling edge of the preamplifier outputs are recorded and transmitted, togheter with the channel address, via two serial links. A programmable discharge current is used to reset the front-end amplifier integrating capacitor in order to provide a linear ToT measurement.The ASIC is implemented in a commercial CMOS 0.11 μm technology. The Triple Modular Redundancy technique has been implemented in most of the digital logic to protect the circuit from Single Event Upsets.