A Flip-Chip 180-GHz Receiver in 40-nm CMOS

This paper presents a 180-GHz direct conversion receiver in a standard 40-nm CMOS technology. The CMOS chip is flip-chip assembled to an integrated-passive-device carrier patch antenna for Gb/s wireless communications. The receiver includes a low-noise amplifier, a single-balanced mixer, a frequency doubler, and an intermediate frequency amplifier. The demonstrated receiver consumes only 110 mW dc power. It shows a probed measured conversion gain of 28.1 dB and an IP
1dB
of −32 dBm. The wireless measurement shows an intermediate frequency bandwidth of 5.5 GHz, supporting a multi-Gb/s wireless connectivity.