A method of memory access optimization for FFT

With the rapid development of modern science and technology, Fast Fourier Transform (FFT) algorithm has become more and more important in engineering applications in recent years, which puts forward higher requirements for FFT operation performance of the processor. Based on the HCC71 DSP core microstructure developed by Jiangsu Huachuang Microsystem Company Limited, this paper proposes a DSP data access optimization method for improving FFT performance. After RTL code transplantation, the method is validated by S2C FPGA verification platform, the experiment result shows that performance of FFT with memory access optimization is improved by 3 to 5 times that without optimization.