A Clock Tree Synthesis Scheme Based On Flexible H-tree

For the timing closure with large skew and latency in traditional clock tree synthesis (CTS), a CTS scheme based on flexible H-tree was proposed. The flexible H-tree with design rule violation (DRV) mode, distance mode, different driver cells and clock leaf nodes was analyzed and discussed. The results shown that this design method can significantly improve the quality of clock tree compared with the traditional CTS methods. Compared with the balanced tree, the setup timing of worst negative slack (WNS) (register-to-register, reg2reg) reduced by 83.1% and the violation paths reduced by 89.1%. Compared with the H-tree, the setup timing (reg2reg) of WNS reduced by 45.6% and the violation paths (reg2reg) reduced by 39.3%.