A Wafer-on-Wafer Non-Uniform High Power Thermal Model for 3D Chip Package

Three-dimensional (3D) stacked embedded DRAM (SeDRAM) relies on Wafer-level logic and DRAM hybrid bonding. While this advanced technology provides the high performance computing, it also has significant challenges in thermal management. An equivalent model for non-uniform temperature and power distribution in SeDRAM with multiple power sources is proposed. Based on HFCBGA package, the junction temperatures and thermal resistances of SeDRAM are investigated. Furthermore, the model is validated by experimental results, and the temperature distribution simulate by equivalent model compares well with the test results. A 2.2°C temperature difference between the proposed model and realistic test demonstrate its availability.