Design and Analysis of Multi-Bit Linear Feedback Shift Register based PRNG with FPGA Implementation using different Primitive Polynomials

Many applications like Data Encryption keys, secure communication channels, etc that use cryptography make use of Linear Feedback Shift Registers (LFSR) based Pseudo-Random Number Generators (PRNG) as they provide better performance as compared to other counters in terms of hardware, area and speed. This paper focuses on a comparative study of standard and modular multi-bit LFSR based PRNGs with different primitive feedback polynomials using Verilog HDL. An FPGA synthesis has been carried out along with a hardware implementation, to assess which architecture yields the best results.