Multi-level Inverter with Reduced Switch Count and DC Source

An innovative multilevel inverter is projected in this paper with the integration of packed U cell and level doubling network. The inverter uses a single DC source and two floating capacitors per phase to provide multilevel output voltage. The voltage across capacitors establishes an unequal ratio along with the available de source. The desired voltage of the capacitor is reached with natural balancing of the capacitor without using any sensors and thus the intermediate dc voltage levels are produced. Hence the proposed topology improves the power quality, reduces the switch count, size and cost when compared to another topology. Operation of the circuits verified by simulations in MATLAB/Simulink.