Hierarchical photoelectric hybrid packet switching network for high-performance computing

This paper proposes a hierarchical photoelectric network with an electrical and optical interleaved packet switching scheme for low latency as well as high throughput in high-performance computing systems. To reduce the overhead of electrical plane or preconfiguration structure adopted in conventional optical networks, what we believe to be a novel electrical switch architecture is proposed to perform route computation for both electrical and optical switches simultaneously. Moreover, a fine-grained flow control mechanism is presented to prevent packet drop and improve link utilization. Based on the developed discrete-event simulator with non-permutation, bit permutation, and digit permutation traffic patterns, experimental results show that the proposed network achieves latency and throughput improvements from 2.3% to 17.3% and −0.01% to 4.7%, respectively. Furthermore, we extend the proposed network with a multilayer electrical and optical interleaved scheme. The multilayer interleaved scheme achieves up to 32.5% latency reduction and 9.6% throughput improvement.