Research on Safety Control System based on Heterogeneous Dual CPU

The security control system requires both the process control function of the normal controller and requires the system to have high reliability and high availability. According to the performance comparison table of the five security control system structures recommended by IEC61508, the 1oo2D and 2oo3 models have the highest safety integrity level (SIL) and availability, compared to the implementation of the 1oo2D system. However, for security control systems, double CPU [1] with different instructions, data storage and data bus is preferred. Therefore, this thesis is designed with a security control system structure that is the CPU as the ARM and MIPS instruction architecture, and provides a hardware structure diagram and software flowchart, which can effectively control the security and effectively running of the system. The feasibility and applicability of the security control technology of the two heterogeneous processors are mainly studied from the safety input and output diagnostic mechanisms and synchronous operation mechanisms of the two CPUs.