A 0.56mW 63.6dB SNDR 250MS/s SAR ADC in 8nm FinFET

This paper presents a SAR ADC that uses coarse and fine comparators with dedicated SAR logics and asynchronous clock generators. The mutual offset of the comparators are calibrated without compromising power consumption and impedance sustained skewed inverters save reference current with low short circuit current without additional CDAC settling time. The ADC achieves 63.6dB SNDR at 250MS/s while consuming 0.56mW, resulting in a 1.81fJ/c.∙s. FoM
W
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