Rigorous Modeling and Investigation of Low-Field Hole Mobility in Silicon and Germanium Gate-All-Around Nanosheet Transistors

The low-field hole mobility in p-type inversion-mode silicon (Si) and germanium (Ge) nanosheet (NS) transistors is rigorously calculated by a physics-based theoretical model, where momentum scatterings from phonons, charged impurities, and surface roughness are all considered. With a holistic physical picture of carrier scattering mechanisms, the effects of material, crystal orientation, channel width, strain/stress, and temperature are investigated comprehensively by the in-house developed numerical simulator. This sound and prospective theoretical work paves the way for clarifying the physics of achieving high hole mobility in ultrascaled NS channels, presenting some valuable insights and guidelines about the device design and fabrication for the next-generation CMOS technology.