Process-Reliability Relationships of SnBiAg and SnIn Solders for Component Attachment on Flexible Direct-Write Additive Circuits in Wearable Applications

Realization of flexible hybrid electronics using additively printed circuits requires the development of component attachment methods with low-temperature processing. Additive electronics may be fabricated on a variety of substrates including Polyimide, PET, PEN. While polyimide may be processed at normal reflow temperatures, thermally stabilized PET and PEN require a peak processing temperature less than 150 °C. A number of new solder materials have emerged capable of being processed at temperatures in the range of 130-150 °C. Low-temperature processing has additional benefits of lower warpage, lower energy consumption and lower carbon footprint. In this paper, the process-performance-reliability relationships have been studied for Sn-Bi-Ag and Sn-In solders on additively printed copper metallization. Process-recipes have been developed for direct write additive printer for fabrication of single layer and multilayer flexible circuits. Copper ink is a good and cost-effective alternative to silver ink, but its use has lagged owing to an increased propensity for oxidation. In this paper, photonic curing has been used to sinter copper ink to make the traces conductive. The method flashes high energy light that sinter metal particles instantaneously and the temperature of the substrate remains low. The effect of the different photonic sintering profiles on the mechanical and electrical properties of the printed traces has been studied. Electrical and mechanical performance has been studied through characterization of the frequency-performance of low-pass filters, high-pass filters and amplifiers fabricated using surface mount components on additively printed metallization. Reliability and the performance degradation of the additively printed circuits has been quantified in flex-to-install applications. In addition, SEM/EDAX has been used to study the intermetallics at the interface of LTS and additively printed circuits.