Process and Design Optimization for Hybrid Cu Bonding Void

There has been lots of requirement to increase the I/O bandwidth and thermal characteristic in flip chip base package. Next-generation 3D SiP products need a gapless hybrid Cu bonding (HCB) process to overcome extremely small bonding pitch and distribute the heats from bottom die. Unlike conventional solder base chip bonding, there are various void sources in gapless HCB process, such as small particles and surface topology, where the interface between the bottom wafer and top chip is in contact without a bonding medium. In addition, the bonding voids have critical risk such as Si popping in the subsequent heat treatment process. Therefore, the control of bonding void in the development of the HCB process is very important for mass production. In this paper, the cause of the occurrence of bonding void is identified and several management factors are proposed in terms of design, process and operation.